1. Field of the Invention
The present invention relates to a stacked gate nonvolatile semiconductor memory and a method for manufacturing the stack gate nonvolatile semiconductor memory.
2. Description of the Related Art
As one of nonvolatile semiconductor memories, a NAND flush memory is well known. With the NAND flush memory, a plurality of memory cell transistors and a plurality of selective gate transistors are provided and in addition, the peripheral circuitry is provided so as to operate the NAND flush memory. The memory cell transistors, the selective gate transistors and the peripheral circuitry are formed on a given semiconductor substrate. Each memory cell transistor includes a floating gate made of a first semiconductor material such as polysilicon and a control gate made of a second semiconductor material such as polysilicon which is formed on the floating gate via an interlayer insulating layer.
Each selective gate transistor can be formed in the same manner as the memory cell transistor. Namely, the selective gate transistors and the memory cell transistors are formed simultaneously. In this case, each selective gate transistor is configured such that a first semiconductor layer made of the first semiconductor material and a second semiconductor layer made of the second semiconductor material are stacked via the interlayer insulating film. In this point of view, the NAND flush memory is structured as a stacked gate nonvolatile semiconductor memory.
With the stacked gate nonvolatile semiconductor memory, particularly, the second semiconductor material constituting the control gate of the memory cell transistor is silicified so as to reduce the resistance of the control gate and thus, reduce the contact resistance for a contact plug. In this case, the operation voltage of the nonvolatile semiconductor memory can be reduced and the operationality of the nonvolatile semiconductor memory can be enhanced (refer to Reference 1).
In the stack gate nonvolatile semiconductor memory, in contrast, the selective gate transistor functions only as a transistor, not a memory. As described above, if the selective gate transistor is made of the first semiconductor layer and the second semiconductor layer via the interlayer insulating film in accordance with the formation of the memory cell transistor as it is, the selective gate transistor can not exhibit the inherent function because the first semiconductor layer and the second semiconductor layer is electrically separated from one another via the interlayer insulating film. In this point of view, it is required to form a conductive layer so as to penetrate through the interlayer insulating film.
Generally, the conductive layer composing the selective gate transistor is made of a silicide through the silicide process for the control gate of the memory cell transistor. In the silicide process for the conductive layer, the intended silicide is formed too deep into the first semiconductor layer not to maintain the stable transistor operation originated from the change in operation performance of the selective gate transistor such as threshold value.    [Reference 1] JP-A 2006-310454 (KOKAI)